131 lines
3.5 KiB
C
131 lines
3.5 KiB
C
/*
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Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de>
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Permission is hereby granted, free of charge, to any person
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obtaining a copy of this software and associated documentation
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files (the "Software"), to deal in the Software without
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restriction, including without limitation the rights to use, copy,
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modify, merge, publish, distribute, sublicense, and/or sell copies
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of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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$Id$
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*/
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/* Memory Map */
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#define CONFIG 0x00
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#define EN_AA 0x01
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#define EN_RXADDR 0x02
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#define SETUP_AW 0x03
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#define SETUP_RETR 0x04
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#define RF_CH 0x05
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#define RF_SETUP 0x06
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#define STATUS 0x07
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#define OBSERVE_TX 0x08
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#define CD 0x09
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#define RX_ADDR_P0 0x0A
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#define RX_ADDR_P1 0x0B
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#define RX_ADDR_P2 0x0C
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#define RX_ADDR_P3 0x0D
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#define RX_ADDR_P4 0x0E
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#define RX_ADDR_P5 0x0F
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#define TX_ADDR 0x10
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#define RX_PW_P0 0x11
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#define RX_PW_P1 0x12
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#define RX_PW_P2 0x13
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#define RX_PW_P3 0x14
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#define RX_PW_P4 0x15
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#define RX_PW_P5 0x16
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#define FIFO_STATUS 0x17
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#define DYNPD 0x1C
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/* Bit Mnemonics */
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/* configuratio nregister */
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#define MASK_RX_DR 6
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#define MASK_TX_DS 5
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#define MASK_MAX_RT 4
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#define EN_CRC 3
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#define CRCO 2
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#define PWR_UP 1
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#define PRIM_RX 0
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/* enable auto acknowledgment */
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#define ENAA_P5 5
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#define ENAA_P4 4
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#define ENAA_P3 3
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#define ENAA_P2 2
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#define ENAA_P1 1
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#define ENAA_P0 0
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/* enable rx addresses */
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#define ERX_P5 5
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#define ERX_P4 4
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#define ERX_P3 3
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#define ERX_P2 2
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#define ERX_P1 1
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#define ERX_P0 0
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/* setup of address width */
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#define AW 0 /* 2 bits */
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/* setup of auto re-transmission */
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#define ARD 4 /* 4 bits */
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#define ARC 0 /* 4 bits */
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/* RF setup register */
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#define PLL_LOCK 4
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#define RF_DR 3
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#define RF_PWR 1 /* 2 bits */
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/* general status register */
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#define RX_DR 6
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#define TX_DS 5
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#define MAX_RT 4
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#define RX_P_NO 1 /* 3 bits */
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#define TX_FULL 0
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/* transmit observe register */
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#define PLOS_CNT 4 /* 4 bits */
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#define ARC_CNT 0 /* 4 bits */
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/* fifo status */
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#define TX_REUSE 6
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#define FIFO_FULL 5
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#define TX_EMPTY 4
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#define RX_FULL 1
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#define RX_EMPTY 0
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/* dynamic length */
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#define DPL_P0 0
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#define DPL_P1 1
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#define DPL_P2 2
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#define DPL_P3 3
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#define DPL_P4 4
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#define DPL_P5 5
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/* Instruction Mnemonics */
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#define R_REGISTER 0x00 /* last 4 bits will indicate reg. address */
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#define W_REGISTER 0x20 /* last 4 bits will indicate reg. address */
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#define REGISTER_MASK 0x1F
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#define R_RX_PAYLOAD 0x61
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#define W_TX_PAYLOAD 0xA0
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#define FLUSH_TX 0xE1
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#define FLUSH_RX 0xE2
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#define REUSE_TX_PL 0xE3
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#define ACTIVATE 0x50
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#define R_RX_PL_WID 0x60
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#define NOP 0xFF
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